Brain Feature Extraction With an Artifact-Tolerant Multiplexed Time-Encoding Neural Frontend for True Real-Time Closed-Loop Neuromodulation.

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  • Author(s): Carlino MF; Gielen G
  • Source:
    IEEE transactions on biomedical circuits and systems [IEEE Trans Biomed Circuits Syst] 2024 Jun; Vol. 18 (3), pp. 511-522. Date of Electronic Publication: 2024 May 28.
  • Publication Type:
    Journal Article; Research Support, Non-U.S. Gov't
  • Language:
    English
  • Additional Information
    • Source:
      Publisher: IEEE Country of Publication: United States NLM ID: 101312520 Publication Model: Print-Electronic Cited Medium: Internet ISSN: 1940-9990 (Electronic) Linking ISSN: 19324545 NLM ISO Abbreviation: IEEE Trans Biomed Circuits Syst Subsets: MEDLINE
    • Publication Information:
      Original Publication: New York, NY : IEEE, c2007-
    • Subject Terms:
      Brain*/physiology ; Artifacts* ; Signal Processing, Computer-Assisted*; Humans ; Algorithms ; Electroencephalography/instrumentation ; Electroencephalography/methods
    • Abstract:
      Closed-loop neuromodulation is emerging as a more effective and targeted solution for the treatment of neurological symptoms compared to traditional open-loop stimulation. The majority of the present designs lack the ability to continuously record brain activity during electrical stimulation; hence they cannot fully monitor the treatment's effectiveness. This is due to the large stimulation artifacts that can saturate the sensitive readout circuits. To overcome this challenge, this work presents a rapid-artifact-recovery time-multiplexed neural readout frontend in combination with backend linear interpolation to reconstruct the artifact-corrupted local field potentials' (LFP) features. Our hybrid technique is an alternative approach to avoid power-hungry large-dynamic-range readout architectures or large and complex artifact template subtraction circuits. We discuss the design and measurements of a prototype implementation of the proposed readout frontend in 180-nm CMOS. It combines time multiplexing and time-domain conversion in a novel 13-bit incremental ADC, requiring only 0.0018 mm 2 /channel of readout area despite the large 180-nm CMOS process used, while consuming only 4.51 μW/channel. This is the smallest reported area for stimulation-voltage-compatible technologies (i.e. ≥ 65 nm). The frontend also yields a best-in-class peak total harmonic distortion of -72.6 dB @2.5-mVpp input, thanks to its implicit DAC mismatch-error shaping property. We employ the chip to measure brain LFP signals corrupted with artifacts, then perform linear interpolation and feature extraction on the measured signals and evaluate the reconstruction quality, using a set of sixteen commonly used features and three stimulation scenarios. The results show relative accuracies above 95% with respect to the situation without artifacts. This work is an ideal candidate for integration in high-channel-count true closed-loop neuromodulation systems.
    • Publication Date:
      Date Created: 20231220 Date Completed: 20240528 Latest Revision: 20241212
    • Publication Date:
      20241212
    • Accession Number:
      10.1109/TBCAS.2023.3344889
    • Accession Number:
      38117616